电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB104 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 80 MHz |
| Maximum Input Frequency: | 220 MHz |
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB104 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 80 MHz |
| Maximum Input Frequency: | 220 MHz |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 8 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | SMB |
| Attenuation Tolerance: | ±0.5 dB |
| Maximum Attenuation: | 3(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R410.203.121 |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 18 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | SMA |
| Attenuation Tolerance: | ±0.9 dB |
| Maximum Attenuation: | 8(Typ) dB |
| Maximum VSWR: | 1.35 |
| Rad Hard: | No |
| Family: | R411.808.121 |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 40 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Attenuation Tolerance: | ±0.8 dB |
| Maximum Attenuation: | 3(Typ) dB |
| Maximum VSWR: | 1.6 |
| Rad Hard: | No |
| Family: | R413.303.000 |
| Rad Hard: | No |
| Family: | R413.808.121 |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 12.4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | TNC |
| Attenuation Tolerance: | ±0.7 dB |
| Maximum Attenuation: | 15(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R414.515.000 |