9DB108BGLFT
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB108 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 80 MHz |
| Maximum Input Frequency: | 220 MHz |
| Rad Hard: | No |
更新于 2026-08-149DB1200CGLF
电气特性 Features
| Type: | PLL Clock Generator |
| Family: | 9DB1200 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 100 MHz |
| Maximum Input Frequency: | 400 MHz |
| Rad Hard: | No |
9DB1200CGLFT
电气特性 Features
| Type: | PLL Clock Generator |
| Family: | 9DB1200 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 100 MHz |
| Maximum Input Frequency: | 400 MHz |
| Rad Hard: | No |
9DB1233AGLF
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB1233 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 90 MHz |
| Maximum Input Frequency: | 110 MHz |
| Rad Hard: | No |
9DB1933AKLFT
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB1933 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 90 MHz |
| Maximum Input Frequency: | 110 MHz |
| Rad Hard: | No |
9DB202CK-01LF
电气特性 Features
| Type: | PLL Frequency Synthesizer |
| Family: | CS9DB202-01 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | Up to 140 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 90 MHz |
| Maximum Input Frequency: | 140 MHz |
| Rad Hard: | No |
9DB202CK-01LFT
电气特性 Features
| Type: | PLL Frequency Synthesizer |
| Family: | CS9DB202-01 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | Up to 140 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 90 MHz |
| Maximum Input Frequency: | 140 MHz |
| Rad Hard: | No |
9DB401BFLF
电气特性 Features
| Type: | PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 400 MHz |
9DB401BFLF
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 200 MHz |
| Rad Hard: | No |
9DB401BFLFT
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 200 MHz |
| Rad Hard: | No |
9DB401BFLFT
电气特性 Features
| Type: | PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 400 MHz |
9DB401BGLFT
电气特性 Features
| Type: | PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 400 MHz |
9DB401CFLF
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 50 to 200 MHz |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 200 MHz |
| Rad Hard: | No |
9DB401CFLF
电气特性 Features
| Type: | PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 400 MHz |
9DB401CFLFT
电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB401 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 50 to 200 MHz |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 200 MHz |
| Rad Hard: | No |