电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | CY2309 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 10 to 133.33 MHz |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
| Type: | Zero Delay PLL Clock Buffer |
| Family: | CY2309 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 10 to 133.33 MHz |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 26.5 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | SMA |
| Attenuation Tolerance: | ±0.6 dB |
| Maximum Attenuation: | 7(Typ) dB |
| Maximum VSWR: | 1.5 |
| Rad Hard: | No |
| Family: | R413.807.121 |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 12.4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | TNC |
| Attenuation Tolerance: | ±0.7 dB |
| Maximum Attenuation: | 3(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R414.503.000 |
| Category: | Transceiver |
| Operating Band Frequency: | 300 to 348|400 to 464|800 to 928 MHz |
| Maximum RF Operating Frequency: | 928 MHz |
| Modulation Technique: | FSK|MSK|QPSK |
| Operating Supply Voltage: | 2.5|3.3 V |
| Rad Hard: | No |
| Rad Hard: | No |
| Family: | R414730000 |
| Category: | Receiver |
| Operating Band Frequency: | 0.52 to 1.71|64 to 108 MHz |
| Maximum RF Operating Frequency: | 108 MHz |
| Modulation Technique: | AM|FM |
| Operating Supply Voltage: | 3.3|5 V |
| Rad Hard: | No |