电气特性 Features
| Type: | PLL Clock Synthesizer |
| Family: | 9LRS4103 |
| Number of Elements per Chip: | 3 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 14.31818 MHz |
| Rad Hard: | No |
| Type: | PLL Clock Synthesizer |
| Family: | 9LRS4103 |
| Number of Elements per Chip: | 3 |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 14.31818 MHz |
| Rad Hard: | No |
| Category: | Receiver |
| Operating Band Frequency: | 300 to 450 MHz |
| Maximum RF Operating Frequency: | 450 MHz |
| Modulation Technique: | ASK|FSK |
| Operating Supply Voltage: | 5 V |
| Rad Hard: | No |
| Category: | Transceiver |
| Operating Band Frequency: | 2400 MHz |
| Maximum RF Operating Frequency: | 2467.1 MHz |
| Modulation Technique: | MSK|FSK |
| Operating Supply Voltage: | 5 V |
| Rad Hard: | No |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 5000 W |
| Connector Type: | SMA |
| Attenuation Tolerance: | ±0.6 dB |
| Maximum Attenuation: | 10(Typ) dB |
| Maximum VSWR: | 1.35 |
| Rad Hard: | No |
| Family: | R417.510.110 |
| Number of Bits: | 6 |
| Maximum Frequency: | 3000 MHz |
| Operating Supply Voltage: | 3.3 to 6 V |
| Rad Hard: | No |
| Category: | Transceiver |
| Operating Band Frequency: | 80 to 650|862 to 950 MHz |
| Maximum RF Operating Frequency: | 950 MHz |
| Modulation Technique: | FSK|MSK |
| Operating Supply Voltage: | 3 V |
| Rad Hard: | No |