ZL30254LDG1
电气特性 Features
| Type: | PLL Clock Multiplier/Attenuator |
| Family: | ZL30254 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 125 to 156.25 MHz |
| Minimum Input Frequency: | 0.008 MHz |
| Maximum Input Frequency: | 25 MHz |
| Rad Hard: | No |
ZL30254LDF1
电气特性 Features
| Type: | PLL Clock Multiplier/Attenuator |
| Family: | ZL30254 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 125 to 156.25 MHz |
| Minimum Input Frequency: | 0.008 MHz |
| Maximum Input Frequency: | 25 MHz |
| Rad Hard: | No |
ZL30253LDG1
电气特性 Features
| Type: | Programmable PLL Clock Multiplier/Attenuator |
| Family: | ZL30253 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000014 to 0.0005 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 0.001 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30253LDF1
电气特性 Features
| Type: | Programmable PLL Clock Multiplier/Attenuator |
| Family: | ZL30253 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000014 to 0.0005 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 0.001 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30252LDG1
电气特性 Features
| Type: | PLL Clock Multiplier/Attenuator |
| Family: | ZL30252 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000001 to 1035 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 0.001 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30252LDF1
电气特性 Features
| Type: | PLL Clock Multiplier/Attenuator |
| Family: | ZL30252 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000001 to 1035 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 0.001 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30251LDG1
电气特性 Features
| Type: | Programmable PLL Frequency Synthesizer |
| Family: | ZL30251 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000001 to 1035 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 9.72 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30251LDF1
电气特性 Features
| Type: | Programmable PLL Frequency Synthesizer |
| Family: | ZL30251 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000001 to 1035 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 9.72 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30250LDG1
电气特性 Features
| Type: | PLL Frequency Synthesizer |
| Family: | ZL30250 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000001 to 1035 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 9.72 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30250LDF1
电气特性 Features
| Type: | PLL Frequency Synthesizer |
| Family: | ZL30250 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 0.000001 to 1035 MHz |
| Operating Temperature: | -40 to 85 °C |
| Minimum Input Frequency: | 9.72 MHz |
| Maximum Input Frequency: | 1250 MHz |
| Rad Hard: | No |
ZL30241LDG1
电气特性 Features
| Type: | PLL Clock Generator |
| Family: | ZL30241 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 12 to 914 MHz |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 2.5|3.3 V |
| Minimum Input Frequency: | 22 MHz |
| Maximum Input Frequency: | 864 MHz |
| Rad Hard: | No |
ZL30241LDF1
电气特性 Features
| Type: | PLL Clock Generator |
| Family: | ZL30241 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 12 to 914 MHz |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 2.5|3.3 V |
| Minimum Input Frequency: | 22 MHz |
| Maximum Input Frequency: | 864 MHz |
| Rad Hard: | No |
ZL30240LDG1
电气特性 Features
| Type: | Programmable PLL Clock Generator |
| Family: | ZL30240 |
| Number of Elements per Chip: | 2 |
| Output Frequency Range: | 12 to 914 MHz |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 2.5|3.3 V |
| Minimum Input Frequency: | 22 MHz |
| Maximum Input Frequency: | 864 MHz |
| Rad Hard: | No |
ZL30240LDF1
电气特性 Features
| Type: | Programmable PLL Clock Generator |
| Family: | ZL30240 |
| Number of Elements per Chip: | 2 |
| Output Frequency Range: | 12 to 914 MHz |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 2.5|3.3 V |
| Minimum Input Frequency: | 22 MHz |
| Maximum Input Frequency: | 864 MHz |
| Rad Hard: | No |
ZL30165GDG2
电气特性 Features
| Type: | PLL Clock Translator |
| Family: | ZL30165 |
| Number of Elements per Chip: | 4 |
| Operating Temperature: | -40 to 85 °C |
| Rad Hard: | No |

更新于 2026-08-15