更新于 2026-08-20电气特性 Features
| Type: | Zero Delay PLL Clock Driver |
| Family: | CDCVF25081 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | -40 to 85 °C |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
相关文章
电气特性 Features
| Category: | Transceiver |
| Operating Band Frequency: | 916.3 to 916.7 MHz |
| Maximum RF Operating Frequency: | 916.7 MHz |
| Modulation Technique: | ASK|OOK |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
电气特性 Features
| Category: | Receiver |
| Operating Band Frequency: | 300 to 340 MHz |
| Maximum RF Operating Frequency: | 340 MHz |
| Modulation Technique: | ASK|FSK |
| Operating Supply Voltage: | 5 V |
电气特性 Features
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 3 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 50 W |
| Attenuation Tolerance: | ±0.7 dB |
| Maximum Attenuation: | 10(Typ) dB |
| Maximum VSWR: | 1.35 |
| Rad Hard: | No |
电气特性 Features
| Number of Bits: | 3 |
| Maximum Frequency: | 4000 MHz |
| Number of Channels: | 1 |
| Rad Hard: | No |
电气特性 Features
| Category: | Transceiver |
| Operating Band Frequency: | 2405 to 2480 MHz |
| Maximum RF Operating Frequency: | 2480 MHz |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |