更新于 2026-08-20电气特性 Features
| Type: | PLL Clock Driver |
| Family: | CDCVF2510 |
| Number of Elements per Chip: | 1 |
| Operating Temperature: | 0 to 85 °C |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
相关文章
电气特性 Features
| Category: | UHF ASK/FSK Receiver |
| Operating Band Frequency: | 433 to 435 MHz |
| Maximum RF Operating Frequency: | 433.92 MHz |
| Modulation Technique: | ASK|FSK |
| Operating Supply Voltage: | 3|5 V |
| Rad Hard: | No |
电气特性 Features
| Category: | Transceiver |
| Operating Band Frequency: | 916.3 to 916.7 MHz |
| Maximum RF Operating Frequency: | 916.7 MHz |
| Modulation Technique: | OOK |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
电气特性 Features
| Number of Bits: | 4 |
| Maximum Frequency: | 2000 MHz |
| Rad Hard: | No |
电气特性 Features
| Category: | Transceiver |
| Operating Band Frequency: | 80 to 916 MHz |
| Maximum RF Operating Frequency: | 916 MHz |
| Modulation Technique: | FSK|MSK |
| Operating Supply Voltage: | 2.5|3.3 V |
| Rad Hard: | No |
电气特性 Features
| Number of Bits: | 16 |
| Number of Channels: | 2 |
| Operating Supply Voltage: | 4.5 to 12 V |
| Rad Hard: | No |