更新于 2026-08-14电气特性 Features
| Type: | Zero Delay PLL Clock Driver |
| Family: | SL23EP04 |
| Number of Elements per Chip: | 1 |
| Output Frequency Range: | 10 to 220 MHz |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 2.5|3.3 V |
| Rad Hard: | No |
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电气特性 Features
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 3 GHz |
| Maximum Power Rating: | 100 W |
| Maximum Attenuation: | 10 dB |
| Rad Hard: | No |
电气特性 Features
| Number of Bits: | 5 |
| Maximum Frequency: | 30000 MHz |
| Rad Hard: | No |
电气特性 Features
| Category: | Transceiver |
| Operating Band Frequency: | 240 to 930 MHz |
| Maximum RF Operating Frequency: | 930 MHz |
| Modulation Technique: | FSK|GFSK|OOK |
| Operating Supply Voltage: | 3 V |
| Rad Hard: | No |
电气特性 Features
| Category: | Receiver |
| Operating Band Frequency: | 315|433.92 MHz |
| Maximum RF Operating Frequency: | 433.92 MHz |
| Modulation Technique: | FSK |
| Operating Supply Voltage: | 3.3 V |
| Rad Hard: | No |
电气特性 Features
| Category: | Transceiver |
| Operating Band Frequency: | 769 to 935 MHz |
| Maximum RF Operating Frequency: | 924 MHz |
| Modulation Technique: | BPSK|QPSK |
| Operating Supply Voltage: | 1.8|3 V |
| Rad Hard: | No |