电气特性 Features
| Type: | PLL Clock Buffer |
| Family: | 9DB801 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 400 MHz |
| Type: | PLL Clock Buffer |
| Family: | 9DB801 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 50 MHz |
| Maximum Input Frequency: | 400 MHz |
| Category: | Receiver |
| Operating Band Frequency: | 302 to 870 MHz |
| Maximum RF Operating Frequency: | 870 MHz |
| Modulation Technique: | ASK/FSK |
| Operating Supply Voltage: | 3.3|5 V |
| Rad Hard: | No |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | SMA |
| Attenuation Tolerance: | ±0.6 dB |
| Maximum Attenuation: | 15(Typ) dB |
| Maximum VSWR: | 1.15 |
| Rad Hard: | No |
| Family: | R413.815.115 |
| Number of Bits: | 5 |
| Maximum Frequency: | 2000 MHz |
| Operating Supply Voltage: | 5(Typ) V |
| Rad Hard: | No |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 40 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Attenuation Tolerance: | ±0.8 dB |
| Maximum Attenuation: | 10(Typ) dB |
| Maximum VSWR: | 1.6 |
| Rad Hard: | No |
| Family: | R413.310.000 |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 12.4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | N |
| Attenuation Tolerance: | ±1.3 dB |
| Maximum Attenuation: | 40(Typ) dB |
| Maximum VSWR: | 1.25 |
| Rad Hard: | No |
| Family: | R414.740.000 |