电气特性 Features
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB106 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 99 MHz |
| Maximum Input Frequency: | 101 MHz |
| Type: | Zero Delay PLL Clock Buffer |
| Family: | 9DB106 |
| Number of Elements per Chip: | Single |
| Operating Temperature: | 0 to 70 °C |
| Operating Supply Voltage: | 3.3 V |
| Minimum Input Frequency: | 99 MHz |
| Maximum Input Frequency: | 101 MHz |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 12.4 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | TNC |
| Attenuation Tolerance: | ±0.7 dB |
| Maximum Attenuation: | 13(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R414.513.000 |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 8 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | SMB |
| Attenuation Tolerance: | ±0.5 dB |
| Maximum Attenuation: | 20(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R410.220.121 |
| Rad Hard: | No |
| Family: | R413.820.115 |
| Category: | Receiver |
| Operating Band Frequency: | 433.72 to 434.12 MHz |
| Maximum RF Operating Frequency: | 434.12 MHz |
| Modulation Technique: | ASK|OOK |
| Operating Supply Voltage: | 2.5|3.3 V |
| Rad Hard: | No |
| Minimum Frequency: | 0 GHz |
| Maximum Frequency: | 8 GHz |
| Impedance: | 50 Ohm |
| Maximum Power Rating: | 100 W |
| Connector Type: | SMC |
| Attenuation Tolerance: | ±0.5 dB |
| Maximum Attenuation: | 3(Typ) dB |
| Maximum VSWR: | 1.3 |
| Rad Hard: | No |
| Family: | R410.103.121 |